Senior Engineering Manager Mentor Graphics
The Mentor Graphics Embedded Systems Division enables embedded development for a variety of applications including automotive, industrial, medical, consumer electronics, networking and military and aerospace. For more information, visit www.mentor.com/embedded.
More than 20 years of IP Design and Verification (Simulation and Emulation) experience. Good experience in Grooming and Managing small teams. Good Knowledge of verilog, vhdl, Specman, Systemverilog,c, erm, uvm. Specialties: IP/Subsytem Design and Verification (Simulation and Emulation) Current responsibilities include - # Managing IP verification group for standard protocols including – 1)AMBA including AXI3/AXI4/ACE 2)MIPI including Slimbus/DSI/CSI/Soundwire/I3C 3)Ethernet 10/100m, 1G/10G/100G, 25G/50G 4)PCIe Gen3.0/Gen4.0 5)USB 2.0/3.0 6) Automotive (CAN/CAN-FD, LIN, Automotive Ethernet) # Managing System Level Validation group for functional verification technologies in Emulation including - 1)Functional Coverage 2) Code Coverage 3)Low Power & Power Estimation 4)Gate Level Emulation
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