Anurag Jain Email Address

Senior Engineer

MediaTek Inc. is a Semiconductors firm that specializes in Wireless Communications, Home Entertainment, Optical Storage, and IC Development.

> Hands on experience in semi-custom ASIC chip design flow upto ~13M instances. > Did Synthesis, die size estimation, SoC Partitioning & Floor-Planning, Full Chip PG creation, Place and Route (PnR), Clock Tree Synthesis (CTS), Custom Routing, Physical Verification. > Worked on various technology nodes: 65nm, 45nm, 28nm, 20nm, 16nm, 14nm & 12nm. > Extensively worked with cross-functional teams like STA, Formal verification & DFT teams for resolving critical issues. > Good understanding in Synthesis, Static Timing Analysis (STA) and DFT. > Training & Mentoring junior engineers in Physical Design and STA. > Good experience in ICC2 flow development/enhancement. > Hands on experience in various industry standard tools such as Synopsys IC Compiler, ICC2, Prime Time, Design Compiler, Cadence First Encounter, Calibre (Mentor Graphics), IC Validator (Synopsys).