Vice President of Product-line
PDF Solutions, Inc. is the leading provider of yield improvement technologies and services for the IC manufacturing process life cycle
*Scribe-line solution for parametric open (soft open) defect detection in 0.5 ppm resolution *Scribe-line solution for transistor defect detection in 10-ppb resolution *Experience in logic technology development, and manufacturbility solution and SOC standard cell library characterization -bulk: 0.13um, 90nm, 65nm, 45nm, 40nm, 28nm, 20nm -FinFET: 16nm/14nm/10nm/7nm - SOI: 28nm, 22FD, 14FD *Provide pseudo ASIC design for early development evaluation of sub-10nm logic process *Lead design teams in providing direct probe CV for 28/14/16/7nm product yield improvement at leading-edge foundries *1xnm-3D-NAND, 2xnm-DRAM characterization and emerging memory by using "DIRECT ACCESS MEMORY CHARACTERIZATION VEHICLE", patent in pending
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